Embedded Internet subplatform as Evatronix’ answer to SoC designers’ needs

The technical and economical background

Over the last few years, the interest for integrating Internet in embedded systems has been steadily increasing. It is due to the fact that Internet is regarded more and more as the most cost-effective way of remotely monitoring and controlling of any object from any place in the world.

Therefore also many System-on-Chip designers who develop applications which may take advantage of easy access to Internet have been searching for ways of fast and low-cost implementation of this connection.

While in most cases the applications are built around 32-bit RISC architectures (with ARM processor playing the leading role), there are still many embedded control applications that may be well served by 8-bit microcontrollers with satisfactory performance.

Evatronix and CMX solution elements

Having much experience in 8-bit architecture, Evatronix took the challenge of creating a low-cost and highly efficient solution for remote access control over Internet.

R8051XC, an 8-bit microcontroller renowned for its configurability and high performance proven in over 100 designs completed by Evatronix licensees, served as a basis for this system. Ethernet MAC-L was added to enable Ethernet service, while CMX Systems, Inc. provided a TCP/IP software stack optimized for 8-bit architecture to equip this solution with Internet access.

R8051XC microcontroller core incorporates the best features of Intel™ and Siemens™ developed 8051 architecture, supported by extensive experience gathered through the years by Evatronix engineers. Evatronix company was always flexible in providing customer-specific configurations of these cores, but it was not available as an automated solution till the R8051XC was introduced.

The MAC-L, on the other hand, is a low-end Ethernet controller, perfect for applications which require Ethernet-enabled embedded systems based on 8-bit architecture.

The optimization of our standard Ethernet MAC architecture towards low gate count required removal of a sophisticated DMA controller, a large register set, and an interrupt controller from the MAC 10/100. Instead of master DMA, the user gets the direct interface to the FIFO memories inside MAC-L, independently for RX and TX data paths. From the host side the MAC-L is seen as a slave with just a few control and status signals. On the other hand, many features remains unchanged from the base MAC 10/100 architecture, like the same flexible FIFO buffering, Ethernet address filtering with 512-bit hash table and the set of sixteen full 48-bit addresses.

The innovative MAC-L module that supports checksum acceleration and a number of other functions of TCP/IP stack was developed at Evatronix company and became an optional part of the Ethernet controller IP core. It is suitable for automatic inserting and checking checksums for commonly used TCP/IP protocols like TCP, IPv4, UDP and ICMP. Settings for each protocol can be defined individually. Checksums for all protocols are computed during the data transmission.

The TCP/IP software stack, delivered by CMX Systems, was optimized to forward checksum tasks to MAC-L’s built-in hardware TCP/IP acceleration module.

A reference design which showed how such remote control can be executed was built using one of Evatronix development environment, EB5-Tiny Evaluation Board, which had been extended with all necessary components into one integrated system.

Good prospects for the future

The solution described above enables quick development of System-On-Chips with performance that can handle Internet connectivity with limited burden for the CPU. It also allows designers of more complex SoCs requiring access to Internet to offload the main processor by integrating Embedded Internet Subplatform as an autonomous subsystem in their SoC.

However the reference design’s functionality was purely demonstrative, such HTTP servers may well serve as information sources in advanced solutions, like intelligent homes, large machinery, probes, etc. Our subplatform can be implemented everywhere, where high reliability is prior to functional abundance.

Constant need for time-to-market reduction as well as cost consciousness issues will more and more effectively attract common SoC designers to reliable, highly-adaptive and affordable architectures, of which Evatronix solution is a perfect example.