Evatronix Application-debugging Support Environment for 8051 and 68000 compliant IP cores improved with trace and TCP/IP support.

The latest improvements prove Evatronix’ engagement in providing SoC designers with time-saving debug solutions.

Gliwice & Bielsko-Biala, Poland, October 14th, 2008 – The Silicon Intellectual Property (IP) provider, Evatronix SA, today announced the availability of the newest version of the Evatronix Application-debugging Support Environment (EASE) for two famous architectures – 8051 and 68000. The unique combination of software and hardware features allows testing the user’s application implemented directly in the target processor, thus eliminating the need for software simulations and shortening overall time-to-market.

The newest release of the EASE enhances its predecessor functionality by two new features: the configurable real-time trace and the TCP/IP support, hence providing customers with better, faster and more convenient interface between the hardware prototype and the embedded software development environment.

The tracing function of the EASE provides designers with detailed information on the program flow in the target CPU core acquired with various methods, among others interrupt subroutine calls. The trace utility operates in two modes: program and data trace. The first one gathers information about program flow with the history of program jumps, while the latter one collects information about the data access, including all modified records. Additionally, users can track read/write access of program variables.

TCP/IP support allows real-time monitoring and debugging by Internet, thus enabling much better allocation of available prototyping resources. Eventually, it can eliminate the need of engineer’s physical presence during the debugging process. With the help of proprietary EDIServer various engineering teams may work on one IP core at different locations.

Both versions of EASE utilize a USB 2.0 Full Speed connection with the PC on which the Integrated Debug Environment (IDE) is installed for fast and convenient debug application setup.

The EASE is a complete debugging solution that is based on the IP core’s built-in On Chip Debug Support module that uses a JTAG interface to communicate with the Evatronix Debug Pod – a hardware component that transfers the data to the PC via the USB cable. Proprietary IDE plug-in, named Evatronix Debug Interface handles the communication between Keil™, Tasking™ or Cygwin debug environments and the target CPU cores. The whole system is user-friendly, with straightforward setup and a wide range of features.

“The EASE is a proprietary solution Evatronix has been using to verify all of the applications that are now available as products to our customers,” said Krzysztof Fijak, Software Manager at Evatronix.“Software stacks, drivers, even our SoC Development Platforms – they have all undergone serious testing to achieve stability and performance of the highest available standard. With a growing need for integrated solutions that would further shorten time-to-market, EASE complements our CPU core offerings in the best possible way.”


Availability and options

The EASE for both 8051 and 68000 compliant IP cores is available now from Evatronix and its distributors. Although standard configurations of the EASE cover multitude of debugging and test applications, Evatronix design team is ready to assist customers to set or extend standard solution for their particular projects.